Design, Hardware Implementation on FPGA and Performance Analysis of Three Chaos-Based Stream Ciphers

In this paper, we come up with three secure chaos-based stream ciphers, implemented on an FPGA board, for data confidentiality and integrity. To do so, first, performed the statistical security hardware metrics of certain discrete chaotic map models, such as Logistic, Skew-Tent, PWLCM, 3D-Chebyshev map, 32-bit LFSR, which are main components proposed generators. Based performance analysis collected from maps, then designed, implemented, analyzed robust pseudo-random number generators sequences (PRNGs-CS) their corresponding ciphers. The PRNGs-CS based predefined coupling matrix M. latter achieves a weak mixing maps multiplexing technique or XOR operator output function. Therefore, randomness generated is expanded well lengths, divide-and-conquer attacks systems avoided. addition, contain polynomial mappings at least degree 2 3 to make algebraic very difficult. Various experimental results obtained in opposition different kinds numerical cryptographic determine high level good achieved by chaos system. system outperformed state-of-the-art works terms high-security throughput can be considered alternative standard methods.